Efficient Quantum Dot Cellular Automata Adder Using Five Input Majority Gate

Abstract

Transistor can be accommodated more and more in single die due to its smaller size but however transistor cannot get smaller than its current size. One of the possible solutions to overcome this physical limit is quantum dot cellular automata (QCA) approach. In QCA, the previous adders are designed using three input majority gate (MG). In this project, a novel quantum-dot cellular automata adder is designed using five input majority gate. Here we apply the Majority logic method for constructing QCA. The designed adder is implemented in FIR and IIR filter. The power and total gate count can be analyzed by using the Xilinx software. The performance analyses of this adder are compared with adder designed using three input MG.